“The most profound shift over the next three to five years will be the compression of the design cycle…and its consequence is design space exploration at a scale that simply wasn’t possible before.”

Frank Ghenassia
Chief Technology
Officer, Ceva

Dr. Zhiping Yang – Signal Integrity and Power Integrity (SIPI) Engineer and Founder/CEO of PCB Automation Inc.

There are two things I think are really holding back hardware progress with AI. The first is knowledge sharing. If you look at the hardware industry today, all these design databases are treated as secrets; they’re not accessible to the public, not shared across the community. But AI needs a lot of training data. Without it, I don’t think it can grow as fast or as well as it could. And this is, I think, one of the fundamental differences between AI in hardware versus software. In software, you have all this open-source code on GitHub, tons of high-quality data that AI can learn from. That’s why coding is one of the most exciting, most advanced areas of AI right now. In hardware, we just don’t have that. No central database, and everyone is treating their designs as IP. That’s the first problem, a real lack of high-quality training data.

The second piece is that hardware doesn’t stand still. It moves fast, roughly doubling in speed every year or two. So a lot of the knowledge needed for the next generation simply doesn’t exist yet. The design and manufacturing rules that work for a 224 gigabit per second (Gbps) SerDes, for example, won’t just carry over to 488 Gbps. You need something new, and that information isn’t out there. Someone has to go figure it out.

“That piece, the creative piece, I don’t think AI has that yet, at least not in hardware design.”

Dr. Zhiping Yang

That’s where I feel human value is still real. I don’t think AI can fully replace the human engineer in the short term, not unless it truly understands physics, can work from Maxwell’s equations and derive things from first principles. I haven’t seen that yet. Right now, AI is still working from existing information, making things better and faster within known territory. It’s not yet pushing the boundary into new territory. That piece, the creative piece, I don’t think AI has that yet, at least not in hardware design.

And honestly, as an SIPI engineer, that feels like job security to me. I think AI can probably already do a second or third 112 Gbps project faster than I can; it’s seen the patterns, it knows the rules. But the first 448 Gbps link? That’s still going to take a human. It took me some time to figure out how to push from 112 Gbps to 224 Gbps or 448 Gbps. I’d expect AI to face the same challenge, unless it can genuinely learn, self-evolve, and develop its own rules and new manufacturing technologies. I believe AI will get there eventually. I’m pretty sure it will, but it’s not there yet, and I think getting there, real creativity, not just building on existing knowledge, that’s probably the next frontier.

Andy Shaughnessy – EDA Industry Journalist

I’ve been writing about the printed circuit board design industry since 1999. I cover EDA tools, fabrication, assembly, and all the industry trade shows. It’s taken me around the world. In the ‘90s, everybody was saying, ‘AI is coming.’ It reminds me of when HDI was the next big thing. It took a while, but once it hit, it really hit. And now AI has hit.

When I started covering PCB design, there was still some real estate available on the board. Now everything is just so jammed in and high-speed, even if it’s not supposed to be a high-speed board, per se. There are more signal integrity, EMI, and thermal management challenges as well. AI has its work cut out.

I’m not seeing AI create anything wondrous or profound on the board yet, but it can help with tasks that involve a lot of repetition. It’s making some headway in schematic capture and place-and-route. But even in the latter, AI isn’t going to know when you can’t rotate a component because you’ll change the polarity. A lot of the time, it takes a live person to make a judgment call.

“You’ve got to make sure everything fits, but you’re also making sure the parts play nice. It’s a perfect mix of art and science.”

Andy Shaughnessy

AI will probably have better luck with the electrical engineering side of things, where there are formulas that explain why things are the way they are. A lot of PCB design is more physical than electronic. You’ve got to make sure everything fits, but you’re also making sure the parts play nice. It’s a perfect mix of art and science.

The biggest challenge is the designers themselves. It’s funny because circuit board designers make their living off of change, but they’re so reluctant to change. Also, designers are artists. They don’t want to give up too much control. Most designers refuse to use autorouters, even though they can cut down hours. But an autorouted board is not pretty, and your coworkers are going to make fun of your design if it’s not pretty.

When I came into the industry, the average age of a PCB designer was around 35. Now it’s closer to 60. There are thousands of open PCB design positions around the world. Hundreds of SMEs retire every year, and they’re taking their tribal knowledge with them. That knowledge took decades to accumulate, and I worry we’ll lose it in the handoff.

AI could help get young designers up to speed, which is important now that mentors have gone the way of the ‘59 Cadillac. Every new designer used to start their career with a mentor. They would shadow for six months sometimes. Now you don’t get six hours: you’re just thrown into the deep end and given a deadline. Start work.

I think designers will come around eventually. In ten years, you may have a whole new group of designers who are digital natives: they grew up playing with their parents’ cell phones, they never used a landline. AI won’t feel like a bridge too far to them.

In the ‘80s, when EDA tools came out, designers were hand-taping boards. It seems like the Stone Age now, but there were designers who said, ‘I’ll never switch to software tools.’ And then pretty soon, fabricators weren’t accepting taped-up board jobs anymore. You had to switch to EDA tools. Eventually, it’s just going to be something you won’t be able to opt out of. You’re just going to have to use AI.

Frank Ghenassia – Chief Technology Officer, Ceva

When it comes to AI, the software industry moved first. AI tools began as assisted editors, advanced to autocomplete, and then evolved to generate well-scoped functions. From there, they moved toward embedded, relevant assistance. Over the past year, we crossed another threshold: AI systems can now write, refactor, and debug non-trivial code with limited supervision. In practice, we increasingly interact with agents as we would with junior or sometimes mid-level engineers. And they have capabilities that humans lack.

Adoption remains uneven, though. While some engineers aggressively integrate AI into their daily workflows, even embracing agentic coding, others remain cautious. This is typical of any tooling shift: early adopters redefine workflow patterns, and the majority follow in waves.

In electronics and hardware design, the barrier is technical, rather than cultural, and it begins with training data. Open-source software repositories are a vast public resource: billions of lines of code, with revision history, bug reports, and tests. That volume is what gave AI models something to learn from. In hardware, there’s no equivalent. Industrial register transfer level (RTL), timing constraints, power intent, and sign-off flows are proprietary. In PCB design, the source design intent is locked in proprietary formats. What is publicly available typically describes what was fabricated, but it rarely explains why those design decisions were made.

The second hurdle is representation. Software is mostly sequential and imperative, a structure that AI, trained on natural language, adapted to quite naturally. Digital hardware, however, is fundamentally concurrent and declarative. RTL describes time-dependent behaviour governed by clocked semantics: concurrency, clock domains, resets, and metastability. In PCB design, elements such as differential pair routing and impedance control are dictated by electromagnetic field behaviour, return-path continuity and crosstalk, rather than by simple connectivity. These are structural and geometric challenges where timing, power, heat, and electromagnetics are constantly at play.

“Hardware companies that fail to adopt these capabilities will operate at a structurally lower design velocity. Eventually, that gap becomes unrecoverable.”

Frank Ghenassia

Third is tool interaction. Software development remains largely text-centric, but hardware design tools are inherently visual and report-heavy. A significant portion of PCB layout involves interactive routing; in back-end VLSI, engineers must interpret timing reports, congestion maps, and IR-drop analysis. We’re already seeing AI applied to RTL linting, constraint synthesis, macro placement, and rule-aware routing optimisation: a shift from text-centric workflows to managing complex, multi-dimensional data.

The most profound shift over the next three to five years will be the compression of the design iteration cycle. High-speed board design, encompassing DDR5, PCIe Gen5/6, and 112G SerDes, requires meticulous stackup definition for controlled impedance, length matching, crosstalk mitigation, and Power Distribution Network (PDN) optimisation. AI-driven systems can now propose these stackups, optimise placement for return-path continuity, and respond automatically to SI/PI simulation feedback. In VLSI, the same logic applies: AI systems iterating within place-and-route to hit timing and power closure can significantly reduce the number of manual loops.

The net effect is not ‘automatic chip generation.’ It is iteration compression, and its consequence is design space exploration at a scale that simply wasn’t possible before. This productivity gain enables a new frontier: either customisation at scale or faster, higher-performing mainstream products. Ultimately, hardware companies that fail to adopt these capabilities will operate at a structurally lower design velocity. Eventually, that gap becomes unrecoverable.

Petr Dvořák – #ThatKiCadGuy and founder of Beny Devices

In the next three to five years, we’re approaching a ‘great decoupling’ in electronics design. We’re moving away from the rigid, monolithic EDA workflows toward an AI-agentic ecosystem.

While 2026 has given us first glimpses of this, the near future will see a significant shift: the role of the hardware engineer moving from drafter to orchestrator. The most profound shift lies in the transition to multi-agent autonomous teams. Instead of a lone engineer wrestling with a complex PCB layout, we’ll manage a digital brain trust of specialised AI agents.

This brain trust will look like a DFM/DFA Agent for real-time auditing for manufacturability and assembly constraints; dedicated agents for signal integrity (SI) and power integrity (PI) that ‘defend’ the board against EMI in real-time; a proactive agent monitoring global market availability, preventing bottlenecks by suggesting footprint-compatible alternatives before a single trace is even laid.

“Perhaps the most wondrous part of the finish line is the ability to conduct effortless, rapid A/B testing at the hardware level.”

Petr Dvořák

By mimicking the collective intuition of the world’s elite layout engineers, these agents will enable us to design with greater precision and speed than was previously thought possible. We are witnessing the death of the ‘build-test-fail-repeat’ cycle. By adopting continuous integration and continuous deployment (CI/CD) principles from the software world, hardware development will become a virtualised, iterative process. We will no longer need to produce to test. We will test as we design, validating the hardware in a digital twin environment. Open-source EDA tools, like KiCad, are no longer just alternatives; they are becoming the backbone of this revolution.

When it comes to the new AI-fuelled ways of working for an engineering team, the finish line is not a world where the engineer is obsolete, but one where the friction between idea and physical reality is zero. In this future, the engineering team functions as a high-level directing force rather than a manual labour pool. In the traditional workflow, a late-stage ‘small change’, such as swapping a QFN package for a BGA or shifting a connector by 5mm, can trigger a catastrophic cascade of rework. In the AI-agentic era, there is no distinction between a small or large modification. Because the agents operate on topological constraints rather than static coordinates, they can re-evaluate and re-route the entire board by themselves.

Perhaps the most wondrous part of the finish line is the ability to conduct effortless, rapid A/B testing at the hardware level. Historically, designing two versions of a complex PCB to compare performance was cost-prohibitive in terms of man-hours. In an AI-driven environment, an engineering team can branch their design like software: Version A, optimised for the lowest possible BOM cost; Version B, optimised for maximum thermal performance and longevity.

The team can simulate both, compare the data, and even produce small batches of both simultaneously. This shifts the engineering culture from ‘getting it to work’ to finding the absolute optimum.

This engineer transition from specialist to generalist will be demanding, though. We are unlearning the offline, decentralised habits of the past and moving toward a centralised, cloud-native, and collaborative mode of work. The hardware engineer of the future will not have a razor-sharp focus on a single niche. Instead, we must become polymaths who understand the entire system.

Amine Kerkeni – Head of Applied AI at InstaDeep

Over the next 3-5 years, the most profound shift will be the transition from AI as a simple routing assistant to a true ‘generative hardware’ co-pilot. We are going to see a rapid evolution toward prompt-to-silicon capabilities, where engineers can feed natural-language specifications and performance constraints into an AI model, and the model will autonomously generate optimised Register-Transfer Level (RTL) code or complex PCB layouts. It won’t replace the engineer, but it will eliminate the immense bottleneck of manual verification and initial drafting, collapsing design cycles from months into days.

As the industry races to adopt these tools, there is no static ‘finish line’ as such. But the ultimate milestone we are racing toward is achieving ‘hardware at the speed of software.’ For decades, electronics engineering has been constrained by rigid, sequential phases and slow iteration cycles. The finish line for an engineering team is a state of ultimate agility, where compiling a complex hardware architecture, running multi-physics simulations, and pushing to fabrication happens as seamlessly as a software team pushing code to the cloud. The team that wins is the one that can iterate in hours rather than quarters.